基于NIOSII的I2C总线接口技术

本科学生毕业论文

论文题目： 基于NiosII的IC总线接口设计

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学 院： 年 级： 专 业： 姓 名：

指导教师：

电子工程学院

集成电路设计与集成系统

2012 年 05 月 20 日

摘要

当今电子信息产业中嵌入式无疑是最热名词，小到手机,PDA,机顶盒，DV，游戏机大到数控汽车电子，数控设备，医疗仪器，航天航空设备，嵌入式在各行各业各个领域都在起着重要的作用。当今主流的嵌入式处理器大概分三类MCU/ARM,DSP,可编程逻辑阵列。FPGA构成的SOPC系统具有富的IP Core资源可供选择、有足够的片上可编程逻辑资源、低功耗、微封装等优点，提高了应用上的灵活性。同时，在开发周期个价格上具有极大的优势。本文主要介绍如何使用Altera的Nios Ⅱ嵌入式软核处理器来实现I2C总线接口。

I2C是常用的串口总线通信协议，是由PHILIPS公司开发的两线式串行总线，其简便性和占用较少的引脚资源使得它在电子产品中广泛使用。文章中详细介绍了如何使用Altera公司的Cyclone Ⅱ系列的FPGA芯片，配置Nios Ⅱ软核处理器来实现I2C总线接口，通过读写串行EEPROM来验证I2C接口实现。

关键词

嵌入式；Nios Ⅱ；FPGA；SOPC；I2C

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Abstract

Embedded in today's electronic information industry is undoubtedly the hottest term, small mobile phones, PDAs, set-top boxes, DV, game consoles, large CNC automotive electronics, CNC equipment, medical equipment, aerospace equipment, embedded in all walks of life in various fieldsplays an important role. Embedded processor in today's mainstream is probably divided into three types of the MCU / ARM, DSP, programmable logic array. FPGA composed of SOPC system has a rich IP Core resources to choose from, there is sufficient on-chip programmable logic resources, the advantages of low power, micro-encapsulation, improved application flexibility. At the same time, has great advantages in the development of cycle price. This paper describes the use of Altera's Nios Ⅱ embedded soft core processor to implement the I2C bus interface.

I2C is a serial bus communication protocol is a two-wire serial bus developed by PHILIPS company, its simplicity and takes less pin resources to make it widely used in electronic products. The article describes in detail how to use Altera's Cyclone Ⅱ series FPGA chip, and configure the Nios Ⅱ soft core processor to implement the I2C bus interface, read and write serial EEPROM to verify the I2C interface.

Key words

Nios Ⅱ;FPGA;SOPC;I2C;Embedded

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目录

摘要 ............................................................................................................................................ I Abstract..................................................................................................................................... II 第一章 绪论 ............................................................................................................................. 1

1.1 课题背景 .................................................................................................................... 1 1.2 研究的目的与意义 .................................................................................................... 1 1.3 研究的基础、背景、现状 ........................................................................................ 2

1.3.1 SOPC技术 ........................................................................................................ 4 1.3.2 Quartus II ..................................................................................................... 5 1.3.3 Nios II ........................................................................................................... 6 1.4 I2C接口芯片24LC04 ................................................................................................. 7 1.5 本章小结 .................................................................................................................... 8 第二章 IC总线技术研究 ....................................................................................................... 9

2.1 I2C总线特点 .............................................................................................................. 9 2.2 I2C总线工作原理 ...................................................................................................... 10

2.2.1 总线的构成和信号类型 ............................................................................... 10 2.2.2 I2C总线上的数据传输 ................................................................................. 12 2.3 本章小结 .................................................................................................................. 13 第三章 设计工具介绍 ........................................................................................................... 14

3.1 Quartus II介绍 ..................................................................................................... 14 3.2 Nios II软核处理器简介 ....................................................................................... 14 3.3 本章小结 .................................................................................................................. 16 第四章 硬件开发流程 ........................................................................................................... 18

4.1 系统需求和设计思路 .............................................................................................. 18 4.2 基于Nios II的硬件开发设计 .............................................................................. 18 4.3 定义Nios II ........................................................................................................... 21

4.3.1 加入Nios II CPU CORE .............................................................................. 22 4.3.2 加入EPCS和SDRAM ...................................................................................... 24

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4.3.3 System ID Peripheral ............................................................................... 25 4.3.4 加入JTAG UART组件 ................................................................................... 25 4.3.5 加入I2C总线的SCL和SDA总线 ................................................................ 26 4.3.6 地址自动分配 ............................................................................................... 27 4.4 本章小结 .................................................................................................................. 30 第五章 软件设计 ................................................................................................................... 31

5.1 功能描述 .................................................................................................................. 32 5.2 本章小结 .................................................................................................................. 33 .第六章 硬件调试与仿真 ..................................................................................................... 34

6.1 硬件调试仿真 .......................................................................................................... 34 6.2 本章小结 .................................................................................................................. 35 结论 ......................................................................................................................................... 36 参考文献 ................................................................................................................................. 37 附录一 ..................................................................................................................................... 38 致谢 ......................................................................................................................................... 45

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